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Welcome to Vector Corporation


Vector Corporation has been providing local customers with general purpose digital cores such as 8/16/32 bit microproccessors, peripherals, security and encryptions, compression cores since 2002. And we are supplying SAS, SATA I/II/III, USB 2.0, USB 3.0 and SD/SDIO/MMC IP.

News Releases

  • 2026. 7. 9. CAST Expands Functional Safety IP Line with ASIL B Ready SENT/SAE J2716 Receiver Core

  • 2026. 7. 2. CAST Licenses TCP/IP Hardware Stack Core for Keysight FieldFox Handheld Spectrum Analyzers

  • 2026. 6. 30. CAST Introduces PSI5-HOST IP Core for Automotive Sensor Interfaces

  • 2026. 4. 27. CAST Introduces MAC-SEC-MG IP Core for Secure 10G+ Ethernet SoC DesignsC

  • 2026. 3. 24. CAST Introduces PDM-to-PCM IP Core for Easy Interfacing of Digital Microphones with SoCs

  • 2026. 3. 12. CAST Debuts TSN-EP-10G IP for High-Performance, Time-Sensitive Networking Ethernet Designs

  • 2026. 3. 10. CAST Introduces 400 Gbps UDP/IP Hardware Stack IP Core for High-Performance ASIC Designs




    • Implementing a two-stage pipeline, the new 32-bit BA51 Low-Power Deeply Embedded RISC-V Processor is compact—just 16k gates in its minimum configuration–but can still run at over 500 MHz in modern ASIC processes.

    The EMSA5-FS is a processor core designed for functional safety. The fault-tolerant processor uses dual or triple instances of the EMSA5, an efficient 32-bit embedded processor IP core implementing the RISC-V Instruction Set Architecture (ISA).


    The CAN,CAN FD and CAN-XL continues to break ground as the most advanced ASIC/FPGA IP around with our recent announcement of support for the Time-Triggered communication protocol (TTCAN). You can even get this with a reference design board and verification IP. CAN FD IP from CAST, Inc.


    The GZIP Data Compression and Decompression cores have such low latency and consume so few resources that customers are actually using them within SoCs—reducing memory size and boosting performance—not just applying them to data coming to and from the SoC. (See the white paper below.)ZGIP IP icon


    The SHA-256 encryption IP core is a fully compliant implementation of the Message Digest Algorithm SHA-256. It computes a 256-bit message digest for messages of up to (264 – 1) bits.

    The BusXpert Micro PCI Express® (PCIe®) analyzer is SerialTek’s second analyzer designed and optimized for equipment manufacturers that are developing storage products and solutions using PCI Express technology. With support for data rates of 2.5 GT/s, 5.0 GT/s (Gen 2) and 8.0 GT/s (Gen 3) and bus widths of x1, x2 and x4, the Micro provides accurate capture, analysis and deep insight of PCIe traffic at all layers of the protocol stack.



    SerialTek provides two market-leading PCI Express® (PCIe®) protocol analysis solutions, the BusXpert PRO and the BusXpert Micro, for the design and test of products that integrate PCIe technology; this includes host bus storage adapters, computer systems, servers and storage products.
    A wide range of cost-effective and flexible probing options are available for BusXpert Analyzer users. These interposer solutions are designed to provide maximum performance and flexibility when capturing PCI Express communication data between hosts and devices; they include slot, M.2 and U.2 interposers.